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MB86S02
Version 0.95e
MB86S02 CIF CMOS Sensor Camera Module
1 Chip CIF CMOS Sensor & Color Processor
Description
MB86S02 is a 10K pixel (CIF size) CMOS image sensor with integrated color signal processor. Integration of CMOS image sensor and color signal processor into 1 chip enables low power consumption and small size. MB86S02 is optimized for applications such as cellular phones and PDA.
Features
Optical format Pixel array number Color filter Supply voltage Power consumption Input Clock Frequency Digital Input voltage Digital output voltage Video output format Color signal processor
Additional function
Serial Interface Camera Module Applications
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: 1/7 inch : 357 x 293 : RGB mosaic (with micro lens) : 2.8V (single voltage) : 30mW (fOSCIN=9MHz, fPCLK=4.5MHz, 15 fps) : 9MHz standard : CMOS level : CMOS level (D0~D7 : High impedance output available) : YCbCr422 / YUV422 (8bit output) : Auto gain control (AGC) Auto exposure control (AE) Auto white balance (AWB) Gamma correction Aperture correction : CIF (352 x 288) / QCIF (176 x 144) Switch function CCIR656 standard header output (Only with CIF function) Anti-flicker function (50Hz / 60Hz) Power save mode Scanning direction variation Stand-by function(22uW) : I2C serial Interface : 21 pin flexible cable (7.80mm x 6.98mm x 4.31mm) : Cellular phones, PDA camera
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Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Optical Specifications
Total array size
Effective pixel size Pixel area Pixel size Sensitivity Saturation voltage SN ratio 373(H) x 301(V) 357(H) x 293(V) 1.96mm x 1.61mm (Diagonal length: 2.54mm) 5.5 um x 5.5 um 60mV/lx @66ms (15 fps), 5100K, F number 2.6with micro lens 600mV 45dB
Lens Specifications
Optical size Lens composition F number Focal length Focus range View angle (Horizontal) Peripheral light ratio TV distortion MTF (center) MTF (peripheral) 1/7 inch 1 piece (Plastic non-spherical surface) 2.6 2.0mm 5cm~10m 60 degree About 60% (at corner edge) About 3.5% More than 100lp/mm (on axis) 85lp/mm (60%)
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Flexible pin positions
6.98mm
4.31mm
Direction of package with lens
Chip
Lens
Flexible lime
Conductor
Connector (Reverse type)
Mother board
7.8mm
21pin
1pin
Area for possible customization
Flexible board connector: 21FLZ-RSM1-TB(Conductor side- face down) Delta mark side is 1PIN. Made by J.S.T. Mfg Co., Ltd.
Regarding Customization of module
Above broken line area can be customized. Length and size of flexible cable can be customized. Maximum I/O pin number is 21. Please ask our sales people for further details.
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Flexible board I/O pins
Pin Name OSCIN XRESET PDWN D0 (LSB) D1 D2 D3 D4 D5 D6 D7 (MSB) PCLK DVSS DVDD SCL SDA AVF AVH VD AVSS AVDD I/O I I I O O O O O O O O O I/O I/O O O O Pin Number Description 1 Clock input pin (9MHz) 2 Device reset signal input pin "L" input : Device reset status (Change to default setting) "H" input : Operation status 3 Power down signal input pin "L" input : Operation status "H" input : Power down status (Stand-by ) *Hold status before power down) 4 Digital video output pin 5 6 Video output format : YCbCr422 / YUV422 (8bit output) 7 8 9 10 11 12 Clock output pin 13 Digital ground pin 14 Digital power supply pin (2.8V) 15 I2C CLK I/O pin 16 I2C DATA I/O pin 17 Active video frame (Effective frame vertical synchronization output) 18 Horizontal effective pixel synchronization output pin 19 Vertical synchronization signal output pin 20 Analog ground pin 21 Analog power supply pin (2.8V)
Note: *Please bypass AVDD and DVDD pins to GND (VSS) with a condenser for high frequency (>1uF). Please attach a condenser for high frequency as near as possible to pins. *I2C access is slave operation only. Slave address is fixed at C2h(Write) and C3h(Read).
Copyright (c) 2001 Fujitsu Limited
Page 4 of 24
MB86S02
Version 0.95e
Block Diagram
AVDD AVSS DVDD DVSS
PDWN AVDD
373 AVSS 301 Pixel Array CDS circuit AMP / Clamp circuit 8bit ADC
fPCLK / 2 DAC
XRESET
D0 to D7
Timing generator / Color signal processor
8
1/2, 1/4, 1/8, 1/16
AVF
VD
AVH
SCL
SDA
PCLK
OSCIN (9MHz)
*Color signal processor
Defective pixel correcting GBR signal
Offset gain adjustment
AWB
Aperture Adjustment
Gamma correct
YUV / YCbCr conversion
4:4:4->4:2:2 Conversion(8bit)
out put
PCLK fPCLK / 2 fOSCIN / 2, fOSCIN / 4, fOSCIN / 8, fOSCIN / 16
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Pixel Composition
2 4
373 4 2
357
301
Effective 357 x 293 293
(1) (2) (2) (1)
4 2
2
4
(1) Shading pixel portion 1 (2) Shading pixel portion 2 (for TEST)
Color Filter Composition
293 292 291 290 --4 3 2 1 1 R G R G --G R G R 2 G B G B --B G B G 3 R G R G --G R G R 4 G B G B --B G B G --------------------354 G B G B --B G B G 355 R G R G --G R G R 356 G B G B --B G B G 357 R G R G --G R G R
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e Absolute Maximum Ratings
Parameter Power supply voltage Input and output voltage Storage temperature *1: Not to exceed +4.0V Symbol AVDD, DVDD D0 to D7, OSCIN, PCLK, VD, XRESET, PDWN, AVH, AVF, SDA, SCL Tstg Min. -0.3 -0.3 -35 Rating Max. 4.0 DVDD+0.3 *1 85 Unit V V C
WARNING : Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Recommended Operating Condition
Parameter Power supply voltage Difference between analog voltage and digital voltage Clock frequency Digital 'H' input voltage OSCIN, XRESET, PDWN Digital 'L' input voltage I2C "H" input voltage SDA, SCL I2C "L" input voltage Operating temperature* I2C clock frequency Symbol AVDD, DVDD dVDD fOSCIN VIHD VILD VIHI2C VILI2C Ta fSCL Min. 2.6 DVDD-0.5 0.7DVDD -25 Value Typ. 2.8 0 9 DVDD 0 Unit Max. 3.0 0.3 20 0.5 0.3DVDD 65 100 V V MHz V V V V C kHz
*:There must not be dewy. ELECTRICAL CHARACTERISTIC DC Electrical Characteristic
Parameter Analog power supply current Condition: Digital power supply current fOSCIN=9MHz, fPCLK=4.5MHz, 15fps Digital "H" output voltage (IOH=-0.4mA) D0 to D7, PCLK, VD, AVH, AVF Digital "L" output voltage (IOL=1mA) Digital input current I2C "H" output voltage(DVDD pull up resistance10kohm) SDA, SCL I2C "L" output voltage Standby current Symbol AIDD DIDD VOHD VOLD IID VOHI2C VOLI2C Istb (AVDD=DVDD=2.8V, Ta=25C) Value Unit Min. Typ. Max. 7 mA 3.5 mA DVDD-0.4 V 0.4 V -20 5 uA DVDD-0.4 V 0.4 V 8 uA
Copyright (c) 2001 Fujitsu Limited
Page 7 of 24
MB86S02
Version 0.95e AC Electrical Characteristic
Parameter Clock frequency System clock 1/2 System clock 1/4 System clock 1/8 System clock 1/16 Symbol fPCLK Min. (AVDD=DVDD=2.8V, Ta=25C) Value Unit Typ. Max. fOSCIN / 2 Hz fOSCIN / 4 Hz fOSCIN / 8 Hz fOSCIN / 16 Hz 2 ns
PCLK - Data out delay
tpd
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e Timing Diagram
PCLK : Positive (default setting) PCLK tpdVO 0.5DVDD 0.5DVDD
AVF VD AVH D7 ~ D0
PCLK : Negative PCLK tpdVO AVF VD AVH D7 ~ D0 0.5DVDD 0.5DVDD
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e Vertical Timing (default, fOSCIN = 9MHz, fPCLK = 4.5MHz, frame rate = 15f/s)
300H 66ms (@15f/s) 12H VD "H" fixed AVF 288H
(HD) *
AVH
D7 ~ D0
Invalid period
Valid period
Invalid period
Vertical Timing (QCIF function, OSCIN = 9MHz, fPCLK = 2.25MHz, frame rate = 15f/s )
300H 66ms (@15f/s) 12H VD "H" fixed AVF 288H
(HD) *
AVH
D7 ~ D0
Invalid period
Valid period
Invalid period
(HD) * : No output of camera module
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e Horizontal Timing (default, fOSCIN = 9MHz, fPCLK = 4.5MHz, frame rate = 15f/s)
VD
1000PCLK 222us (@15f/s)
'H' fixed
AVF
106PCLK
94PCLK 96PCLK
(HD) *
296PCLK 704PCLK
2line 287line 288line
AVH
1line
D7 ~ D0
Valid Valid Valid Valid period period period period Invalid period Invalid period Invalid period
Invalid period
Invalid period
Horizontal Timing (QCIF function, OSCIN = 9MHz, fPCLK = 2.25MHz, frame rate = 15f/s ) VD
500PCLK 222us (@15f/s)
"H" fixed AVF
47PCLK 52PCLK 49PCLK
(HD) *
352PCLK
AVH
1line
144line
D7 ~ D0
Valid Invalid period period Invalid period Valid period Invalid period
(HD) * : No output of camera module
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Digital Video output timing (Default setting : CIF, fOSCIN = 9MHz, fPCLK = 4.5MHz, frame rate = 15f/s )
AVH
PCLK
Cb 0 Y 0 Cr 0 Y 1 Cb 2 Y 2 Cr 2 Y 3 Cb Y Cr Y Cb Y Cr Y 348 348 348 349 350 350 350 351 (U) (Y) (V) (Y) (U) (Y) (V) (Y)
D7 ~ D0
Invalid period
(U) (Y) (V) (Y) (U) (Y) (V) (Y)
Invalid period
Digital Video output timing (QCIF, fOSCIN = 9MHz, fPCLK = 2.25MHz, frame rate = 15f/s )
AVH
PCLK
Cb 0 Y 0 Cr 0 Y 1 Cb 2 Y 2 Cr 2 Y 3 Cb Y Cr Y Cb Y Cr Y 172 172 172 173 174 174 174 175 (U) (Y) (V) (Y) (U) (Y) (V) (Y)
D7 ~ D0
Invalid period
(U) (Y) (V) (Y) (U) (Y) (V) (Y)
Invalid period
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Digital Video output timing ( SAV/EAV mode)
(Default setting, fOSCIN = 9MHz, fPCLK = 4.5MHz, frame rate = 15f/s )
AVH
PCLK
Cb 0 Y 0 Cr 0 Y 1 Cb Y Cr Y 350 350 350 351 FFh 00h 00h (U) (Y) (V) (Y)
D7 ~ D0
Invalid period
FFh 00h 00h
(U) (Y) (V) (Y)
Invalid period
Active V blank
SAV 80h ABh
EAV 9Dh B6h
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e Power save mode ( fOSCIN = 9MHz, fPCLK = 4.5MHz, frame rate = 5f/s )
66ms VD
6H - 230PCLK 6H - 230PCLK Operation
133ms
AVF
Power save period Operation
Power save period Operation
(HD) *
AVH
D7~D0
Valid period Invalid period Valid period Invalid period Valid period Invalid period
(HD)* No output of camera module
Power consumption at power save mode and stand-by function.
Power consumption 15fps 30mW 5fps(at power save mode) 15mW Stand-by function 22uW
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e Resister Setting
Group Address 00 Name VER Bit 07-00 07 06-03 Data 0 : ROM Read fail data 1 : ROM Read success Unused 00 : 1/2dividing frequency (fPCLK = fOSCIN/2) 01 : 1/4dividing frequency (fPCLK = fOSCIN/4) 10 : 1/8dividing frequency (fPCLK = fOSCIN/8) 11 : 1/16dividing frequency (fPCLK = fOSCIN/16) 0 : Operation usually 1 : Timing reset on 0 : with SAV/EAV, 1 : no header 0 : Gamma correction ON, 1 : OFF 0 :Aperture correction ON ,1 : OFF 0 : color, 1 :G=B=R 0 : Filter ON, 1 : OFF 0 : CIF, 1 : QCIF 0 : Normal, 1 : Upper side down 0 : Normal, 1 : Mirror 00 : Auto, 01 : Auto 10 : Fixed line, 11 : Manual 00 : Auto , 01 : Fixed1 10 : Fixed, 11 : Fixed 3 0 : AWB on, 1 : AWB off 0 : Offset binary 1 : Straight binary 0 : UV/CbCr Out ahead 1 : Y Out ahead 0 : YCbCr, 1 : YUV 0 : Active "H", 1 : Active "L" 0 : Active "H", 1 : Active "L" 0 : Active "H", 1 : Active "L" 0 : Active "H", 1 : Active "L" 0 : Positive , 1 : Negative 0 : Positive, 1 : Negative Unused 0 : D0-D7Output usually 1 : D0-D7Output high impedance Unused Default -
R/W
R R -
Description Version information EEPROM data loading status Unused
01
IDR
02-01
00
R/W
Clock divider
00 07 06 05 04 03 02 01 00 07-06 05-04 03 MD2 03 02 01 00 07 06 05 04 POLR 04 03 02 01 00 RSV 05 RSV05 07-00
0 0 0 0 0 1 0 0 0 00 00 0 0 0 0 0 0 0 0 0 0 0 -
W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W -
Timing reset CCIR656 Header Gamma correction (Range : 23-29) Aperture correction (Range : 20-22) Mosaic into GBR Defective pixel correcting filter CIF/QCIF Function select Vertical scanning direction Horizontal scanning direction AGC mode (Range 32-40) White balance coefficient (Range 44-54) Auto white balance YUV/YCbCr Output binary Video out put Video output format AVF Polarity AVH Polarity HD Polarity (Camera module internal signal) VD Polarity PCLK Polarity D0-D7 Polarity Unused D0-D7Output high impedance Unused
02
MD1
CTRL
Copyright (c) 2001 Fujitsu Limited
Page 15 of 24
MB86S02
Version 0.95e
Group Address 06 07 TMG 08 09 0A 0B 0C 0D 0E LUT 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 T_VSTT T_VWID L_I1G L_I1B L_I1R L_G1G L_G1B L_G1R L_I2G L_I2B L_I2R L_G2G L_G2B L_G2R C_GG C_GB C_GR C_BG C_BB C_BR C_RG C_RB C_RR RSV1F A_KG A_KB A_KR 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 Name T_HSTT T_HWID Bit 07-00 07-00 Data Range : 0 to 255(d) 0(d) : 0CLK, 14(d) : 14CLK Range : 0 to 255(d) 0(d) : 0pixel, 176(d) : 352pixel Range : 0 to 255(d) 0(d) : 0line, 8(d) : 8line Range : 0 to 255(d) 0(d) : 128line, 160(d) : 288line Range : 0 to 255(d) Range : -128 to 127(d) -128(d) : (-128 + 128) / 128 = 0 0(d) : (0 + 128) / 128 = 1 127(d) : (127 + 128) / 128 2 Range : 0 to 255(d) Range : -128 to 127(d) -128(d) : (-128 + 128) / 128 = 0 0(d) : (0 + 128) / 128 = 1 127(d) : (127 + 128) / 128 2 Default 14(d) 176(d) 8(d) 160(d) 16(d) 16(d) 16(d) 9(d) 98(d) 49(d) 128(d) 128(d) 128(d) 9(d) 98(d) 49(d) 19(d) -7(d) -12(d) -35(d) 36(d) -1(d) -11(d) 5(d) 6(d) 32(d) 32(d) 32(d) R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Description Horizontal start position of AVH CIF:14CLK, QCIF:18CLK (recommended) Width of AVH (Width of AVH = Set value * 2) Vertical start position of AVH Effective line of AVH (AVH output line number = Set value + 128) G Black level (Green) B Black level (Blue) R Black level (Red) Low level gain set(Green) Low level gain set (Blue) Low level gain set (Red) High level threshold code setting (Green) High level threshold code setting (Blue) High level threshold code setting (Red) High level gain set (Green) High level gain set (Blue) High level gain set (Red) Matrix elements of color Correction GO=GI+(GI*C_GG)+(BI*C_GB)+(RI*C_GR) BO=BI+(GI*C_BG)+(BI*C_BB)+(RI*C_BR) RO=RI+(GI*C_RG)+(RI*C_RB)+(RI*C_RR)
COL
Range : -128 to 127(d)
RSV APR
Unused Range : -128 to 127(d) -128(d) : Soft (-128/64) 0(d) : No correction (0/64) 127(d) : Sharp (127/64)
Unused Outline emphasis (Green) Outline emphasis (Blue) Outline emphasis (Red)
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Group Address 23 24 25 26 GMM 27 G_G2 Name G_I2 G_I3 G_G1 G_C2 Bit 07-00 07-00 07-00 07-01 00 07-00 Data Range : 0 to 255(d) Range : 0 to 255(d) 0(d) : g1 = 0/16 16(d) : g1 = 16/16 255(d) : g1 = 255/16 Unused 0:gamma = 0.45, 1:gamma = 1.0 Range : 0 to 255(d) 0(d) : g2 = 1 + 0/256 92(d) : g2 = 1 + 92/256 255(d) : g2 = 1 + 255/256 Range : -128 to 127(d) -128(d) : g3 = 1 + (-128/128) 0(d) : g3 = 1 + (0/128) 127(d) : g3 = 1 + (127/128) Range : -128 to 127(d) Range : 0 to 255(d) 0(d) : 0/256 126(d) : 126/256 255(d) : 255/256 Range : 0 to 255(d) 0(d) : 0/256 225(d) : 225/256 255(d) : 255/256 Default 4(d) 150(d) 16(d) 0(d) 92(d)
R/W
R/W R/W R/W R/W R/W
Description Range of the Middle level min set (I2) Range of the Middle level max set (I3), I228 29 2A
G_G3 G_OFF2 Y_GU
07-00 07-00 07-00
-96(d) 44(d) 126(d)
R/W R/W R/W
The high-level gain (g3) The middle level offset (of2) Gain of chrominance(U)
2B YUV 2C 2D 2E 2F 30 31
Y_GV Y_LIM_YL Y_LIM_YH Y_LIM_UL Y_LIM_UH Y_LIM_VL Y_LIM_VH
07-00 07-00 07-00 07-00 07-00 07-00 07-00
225(d) 0(d) 255(d) 0(d) 255(d) 0(d) 255(d)
R/W R/W R/W R/W R/W R/W R/W
Gain of chrominance(V) Y value low-level limit Y value high-level limit U value low-level limit U value high-level limit V value low-level limit V value high-level limit
Range : 0 to 255(d)
Copyright (c) 2001 Fujitsu Limited
Page 17 of 24
MB86S02
Version 0.95e
Group Address 32 33 Name A_HSTT A_VSTT Bit 07-00 07 06-00 07-04 34 A_WID 03-00 35 36 37 AGC 38 A_LINEU 07-00 A_INTVL A_DEAD A_GAIN 07-00 07-06 05-00 07-00 Data Range : 0 to 255(d) 29(d) : 58pixel Unused Range : 0 to 95(d) 27(d) : 54pixel 0000 : none, 0110 : 32line 0111 : 48line, 1000 : 64line 1001 : 96line, 1010 : 128line 1011 : 192line, 1100 : 256line 0000 : none, 0110 : 32pix 0111 : 48pix, 1000 : 64pix 1001 : 96pix, 1010 : 128pix 1011 : 192pix, 1100 : 256pix Range : 0 to 255(d) 0(d) : 0frame Unused Range : 0 to 63(d) Range : 0 to 255(d) 0(d) : 0/256, 32(d) : 32/256 255(d) : 255/256 Range : 0 to 150(d) 0(d) : 0 line 149(d) : 298line 150(d) : 300line Range : 0 to 150(d) 0(d) : 0 line 1(d) : 2 line 150(d) : 300 line Unused Range : 0 to 24(d) 0(d) : 0dB, 12(d) : 12dB 24(d) : 24dB Unused Range : 0 to 24(d) 0(d) : 0dB, 21(d) : 21dB 24(d) : 24dB Range : 0 to 255(d) Read only Read only Read only Read only Default 29(d) 27(d) 1011
R/W
R/W R/W R/W
Description Horizontal start position of the AGC active window (Start pixel = set vale * 2) Unused Vertical start position of the AGC active window (Start line = Set vale * 2) Vertical width of the AGC active window
1100 0(d) 20(d) 32(d)
R/W R/W R/W R/W
Horizontal width of the AGC active window AGC Detection frame interval Unused Dead value width of the AGC feed back gain AGC feed back gain Upper limit of the number of integration lines. Set the number of line / 2 At AGC off this value is exposure lines Lower limit of the number of integration lines. Set the number of line / 2 Unused Amp gain setting at AGC off Unused AGC Amp gain limiter Y level target value Y Level average (read only) AGC Integration line number (read only) AGC Amp Gain (read only)
149(d)
R/W
39
A_LINEB
07-00 07-05
1(d) 12(d) 21(d) 120(d) -
R/W R/W R/W R/W R R R R
3A
A_INTG
04-00 07-05
3B 3C 3D 3E 3F 40
A_MAXG A_LEVEL A_AVRG A_INTGL A_INTGH A_AGAIN
04-00 07-00 07-00 07-00 07-00 07-00
Copyright (c) 2001 Fujitsu Limited
Page 18 of 24
MB86S02
Version 0.95e
Group Address Name Bit 07 06 41 FMD 05-02 01 FLC 42 FTHR 03-00 07-04 43 FACT 03-00 00 07-04 Read only Read only Unused 0:1 : Flicker restart 0 : Flicker mode auto 1 : Flicker mode off Range : 1 to 15(d) 1(d) : 4count, 2(d) : 8count Range : 1 to 15(d) 1(d) : 4code, 5(d) : 20code Range : 1 to 15(d) 1(d) : 4frame, 8(d) : 32frame Range : 1 to 15(d) 1(d) : 4frame, 10(d) : 40frame Data Default 0 0 2(d) 5(d) 8(d) 10(d) R/W R R R/W R/W R/W R/W R/W R/W Description Flicker mode reading 0 : Flicker removal stop 1 : Flicker removal active 0 : 60Hz detection, 1 : 50Hz detection Unused Flicker start Flicker mode on/off Counter setting of flicker detection (The times =setting valuex4) Threshold of flicker detection (The threshold =setting valuex4) Delay for starting auto flicker detection (The delay =setting valuex4) Maximum frame number of AFD (The maximum frame =setting valuex4)
Copyright (c) 2001 Fujitsu Limited
Page 19 of 24
MB86S02
Version 0.95e
Group Address 44 45 Name W_HSTT W_VSTT Bit 07-00 07-00 07-04 46 W_WID 03-00 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 W_INTVL W_LIMB W_LIMR W_DEADB W_DEADR W_GAIN W_GB0 W_GR0 W_GB1 W_GR1 W_GB2 W_GR2 W_GB3 W_GR3 W_AVGB W_AVGR RSV57 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 07-00 Data Range : 0 to 255(d) Range : 0 to 255(d) 0000 : none, 0110 : 32line 0111 : 48line, 1000 : 64line 1001 : 96line, 1010 : 128line 1011 : 192line, 1100 : 256line 0000 : none, 0110 : 32pix 0111 : 48pix, 1000 : 64pix 1001 : 96pix, 1010 : 128pix 1011 : 192pix, 1100 : 256pix Range : 0 to 255(d) 0(d) : 0frame Range : 0 to 255(d) Range : 0 to 255(d) Range : 0 to 255(d) Range : 0 to 255(d) Range : 0 to 255(d) 0(d) : gain = 0 / 256 16(d) : gain = 16 / 256 255(d) : gain = 255 /256 Default 29(d) 27(d) 1011 R/W R/W R/W R/W Description Horizontal start position of the AWB window (The start pixel =setting valuex2) Vertical start position of the AWB window (The start line =setting valuex2) Vertical line number of the AWB window.
1100 0(d) 25(d) 25(d) 2(d) 2(d) 16(d) 0(d) 0(d) -32(d) 26(d) -16(d) 6(d) 27(d) -54(d) -
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R -
Horizontal pixel number of the AWB window. AWB frame interval Limit of blue signal of white area Limit of red signal of white area Dead band width of AWB feed-back (Blue) Dead band width of AWB feed-back (Red) AWB feed back gain 4150K initial gain (Blue) 4150K Initial gain (Red) 6500K Fixed gain setting (Blue) 6500K Fixed gain setting (Red) 5000K Fixed gain setting (Blue) 5000K Fixed gain setting (Red) 2856K Fixed gain setting (Blue) 2856K Fixed gain setting (Red) Average of B - Y Average of R - Y Unused
AWB
Range : -128 to 127(d)
RSV
Read only Read only Unused
Copyright (c) 2001 Fujitsu Limited
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MB86S02
Version 0.95e
Group Address 58 59 5A 5B 5C Name HTC HSYS HSYE RSV5B VSYS VSYE Bit 07-00 07-00 07-00 07-00 07-06 05-03 02-00 Data Range : 0 to 255(d) 0(d) : 500ck, 255(d) : 1010ck Range : 0 to 255(d) 0(d) : 0ck, 50(d) : 50ck Range : 0 to 255(d) 0(d) : 0pix, 46(d) : 46pix Unused Unused Range : 0 to 7(d) Range : 0 to 7(d) Default 0(d) 50(d) 46(d) 1(d) 0(d) R/W R/W R/W R/W R/W R/W Description Horizontal counters (Counter = set value * 2 + 500) HD start position HD pixel width Unused Unused VD start position VD end position 00: Align both rising and falling edge to the rising edge of HSYNC 01: Align rising edge to the falling edge of AVH, and falling edge to the rising of AVH 10: Align rising edge to the rising edge of AVH, and falling edge to the falling of AVH 11: Align rising edge to the falling edge of AVH, and falling edge to the falling of AVH VD rising edge timing adjustment
07-06
Range : 0 to 3(d) VD edge alignment
0(d)
R/W
5D
VSYHADJ 05-03
TG 02-00 07 5E AV_HS 06-00 07 5F AV_HE 06-00 07 60 AV_VS 06-00 07 61 AV_VE 06-00
Range : 0 to 7(d) 0(d) : -5CLK 5(d) : 0CLK 7(d) : +2CLK Range : 0 to 7(d) 0(d) : +5CLK 5(d) : 0CLK 7(d) : -2CLK Unused Range : 0 to 127(d) 0(d) : 0pix 1(d) : 1pix 127(d) : 127pix Unused Range : 0 to 127(d) 0(d) : 0pix 1(d) : 1pix 127(d) : 127pix Unused Range : 0 to 127(d) 0(d) : 0pix 127(d) : 127pix Unused Range : 0 to 127(d) 0(d) : 0pix 127(d) : 127pix
5(d)
R/W
5(d) 1(d) 1(d) 0(d) 0(d)
R/W R/W R/W R/W R/W
VD falling edge timing adjustment Unused Horizontal start position of AVH in pixels Unused Horizontal end position of AVH in pixels Unused Vertical start position of AVH in pixels Unused Vertical end position of AVH in pixels
Copyright (c) 2001 Fujitsu Limited
Page 21 of 24
MB86S02
Version 0.95e
Group Address Name Bit 07 06 05 04-00 63 BKLVL 07-00 07 06 64 BKCLP 05-03 02-00 07-06 65 ANLG1 05-04 03-01 00 07-06 05-04 IMGR 66 ANLG2 03-02 01-00 07-06 05 04 03 02 01-00 07 06 05-02 01 00 07 06 05 04-00 Data Unused 0 : off, 1 : on 0:Continuous operation 1:long exposure (at power save period) Range : 2 to 31(d) 2(d) : 2frame Range : 0 to 255(d) 16(d) : 16code (1.064V) 0 : on, 1 : off 0 : every line, 1 : every frame Range : 0 to 7(d) 1(d) : 1pixel Range : 0 to 7(d) 4(d) : 3pixel (=7-X) Unused 00 : 4ck, 01 : 5ck 10 : 6ck, 11 : 7ck Unused 0:gain twice, 1:gain 4times Unused 00 : 0ns, 01 : 3.6ns 10 : 7ns, 11 : 10.4ns 00 : 30ns, 01 : 39ns 10 : 43ns, 11 : 47ns 00 : 0ns, 01 : 1ns 10 : 2ns, 11 : 3ns Unused 0 : 2/2, 1 : 1/2 0 : just setting, 1 : 1frame delay 0 : gain x 1.5, 1 : gain x 2.2 0 : no reduction, 1 : reduction mode 00 : gamma off 01 : gamma1 (192code = 0.4V) 10 : gamma2 (192code= 0.5V) 11 : Unused test test Unused 0:normaly, 1:FCLK=VCLK 0:normaly, 1:FCLK=HCLK Unused 0:off, 1:om 0:average, 1:weighted 0:0dB - 24dB 20:20dB - 24dB 24:24dB Default 0 0 2(d) 16(d) 0 1 1(d) 4(d) 00 0 00 00 00 0 0 1 0 00 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Description Unused Power save mode on/off Long exposure mode Power save period(frame number) Black clamp level Black clamp on/off Black clamp mode Start pixel of black clamp End pixel of black clamp X: setting difference from start position(7) Unused Reserved for timing adjustment (Please use default setting) Unused Aperture gain Unused OCLP rising edge delay OSH rising edge delay CLKAD phase delay Unused Analog power reduction mode Please use default setting Gain of AMP1 setting ADC power reduction (HBLANK OFF) Gamma of AD converter test test Unused VCLK HCLK Digital clamp correcting on / off Choosing correcting method Defective pixel correcting filter on / off
62
PWRSV
67
ANLG3
68
TEST
69
ANLG4
20(d)
R/W
Copyright (c) 2001 Fujitsu Limited
Page 22 of 24
MB86S02
Version 0.95e
Group Address 6A 6B 6C 6D 6E 6F Name Reserved RSV6B TEST1 TEST2 TEST3 TEST4 Bit 07-00 07-00 07-00 07-00 07-00 07-00 Data Unused Unused test test test test Default R/W R/W R/W R/W R/W Description Unused Unused test test test test
TEST
Copyright (c) 2001 Fujitsu Limited
Page 23 of 24
Type 1 REFERENCE FIGURE
MB86S02
Version 0.95e
FUJITSU LIMITED
For further information please contact: Japan FUJITSU LIMITED
System Solution LSI Division Electronic Devices Akiruno Technology Center 50 Fuchigami, Akiruno 197-0833, Japan Tel: +81-42-532-2131 Fax: +81-42-532-2414 http://edevices.fujitsu.com
North and South America FUJITSU MICROELECTRONICS AMERICA, INC.
1250 East Arques Avenue Sunnyvale, California 94088-3470 USA Tel: (800) 866-8608 Fax: (408) 737-5999 Email: inquiry@fma.fujitsu.com http://www.fma.fujitsu.com
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The contents of this document may not be reproduced or copied without the permission of FUJITSU LIMITED. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipments, industrial, communications, and measurement equipments, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or
Europe FUJITSU MICROELECTRONICS EUROPE GmbH
Am Siebenstein 6-10, D-63303 Dreieich-Buchschlag, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://www.fme.fujitsu.com
Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD.
#05-08, 151 Lorong Chuan New Tech Park, Singapore 556741 Tel: +65-281-0770 Fax: +65-281-0220 http://'www.fmap.com.sg/
FUJITSU MICROELECTRONICS KOREA LTD.
1702 Kosmo Tower, 1002 Daechi-Dong, Kangnam-Gu, Seoul 135-280, Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 FUJITSU LIMITED
technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
"Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined
Copyright Fujitsu Limited 2001

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